1. Technical Field
The present disclosure relates to the field of MOS transistors. The present disclosure relates more particularly to the field of trench MOSFETs.
2. Description of the Related Art
Trench MOSFETs are a type of vertical MOSFET in which the source region is at a top surface of a semiconductor substrate and the drain region is at a bottom surface of a semiconductor substrate. A body region is formed in the semiconductor substrate between the source and the drain. A trench is etched in the semiconductor substrate having sidewalls along the source and body regions. The trench is filled with polysilicon to form a gate electrode.
For a PMOS device, it is beneficial to dope the polysilicon of the gate electrode with P type ions to reduce the value of the work function between the polysilicon and the silicon of the substrate. The threshold voltage for turning on the transistor is dependent on the work function of the transistor. The lower the work function, the lower the threshold voltage can be.
In some cases it can be very difficult to dope the polysilicon with P type dopant ions. Non-in situ P type doping requires very large thermal budgets. First, boron is implanted into the polysilicon by ion implantation. Afterwards, a diffusion step is performed to diffuse the boron into the deep portions of the trench. This diffusion step requires heating the device to very high temperatures. If the temperature is too high, the gate oxide can be contaminated with boron, leading to the possibility that the gate oxide will not perform reliably. If the temperature is not high enough, the boron will not diffuse all the way into the polysilicon in the trench. This can lead to poor conductivity of the gate electrode, causing poor performance of the trench MOSFET. It can be very difficult to precisely control the temperature during diffusion of the boron into the gate electrode.
FIG. 1A is a cross-section of semiconductor substrate 20 in which will be formed a P type trench MOSFET. The semiconductor substrate 20 includes a highly doped P type drain region 24, and a lightly doped P type drain region 26. N type dopant ions are being implanted in a single implantation step into the semiconductor substrate 20 to form a transistor body region 27 that is doped N type. The dopant ions are being implanted with an implantation energy of 340 keV.
In FIG. 1B, highly doped deep body regions 31 are formed by implanting type dopant ions in small pockets on the far left and right sides of the body region 27. The dopant ions in FIG. 1B are implanted with an implantation energy of 340 keV.
In FIG. 1C, highly doped body contact regions 34 have been formed. Highly doped P type source regions 36 have also been formed adjacent the body contact regions 34. A trench 39 has been etched in the semiconductor substrate 20. The trench 39 is about 1.3 μm deep. The trench 39 is lined with a gate oxide layer 41. Polysilicon has been deposited in the trench 39 to form a gate electrode 43.
In FIG. 1C, P type dopant ions, for example boron, are implanted into the polysilicon gate electrode 43. The P type dopant ions are implanted having a relatively low energy so that they do not puncture through the gate oxide 41 and enter the highly doped source and body regions 36, 34, respectively. As described previously, after the ions are implanted into the polysilicon gate electrode 43, the diffusion step is performed to diffuse the dopant ions deeper into the trench 39 by heating the semiconductor substrate 20 to a particular high temperature.
In order to protect the gate electrode from being degraded by boron diffusion, it can be necessary to have gate oxide nitridization or N2 presence at the interface of the polysilicon and the gate oxide. This additional step further increases the cost of manufacturing the trench MOSFET.